The present invention relates to a logic circuits and, more particularly to an ECL logic signal input register for providing transition to CMOS output level signals.
Electronic circuits referred to as registers are well known in the art for retaining data information at an output between input clocking pulses even though the input data may change between such pulses. A typical application for multiple registers is in memory circuits such as a Random Accessible Memory (RAM) device. The prior art is complete with myriad of such registers implemented in either solely ECL or CMOS technology.
In today's environment, where it is desired to make integrated circuit memory devices more complex while maintaining or increasing speed and decreasing power dissipation on the chip, it has become necessary to combine both the bipolar ECL and CMOS technologies. ECL technology is required to be able to permit the application of relatively low input logic level signals while CMOS technology provides larger output logic level signals.
Therefore a need exists for BICMOS (combined bipolar ECL and CMOS technology) circuit for providing high speed translation between ECL inputs and CMOS outputs.